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? semiconductor components industries, llc, 2013 april, 2013 ? rev. 2 1 publication order number: NCP752/d NCP752 200 ma, ultra-low quiescent current, i q 12 a, ultra-low noise, low dropout regulator noise sensitive rf applications such as power amplifiers in satellite radios, infotainment equipment, and precision instrumentation require very clean power supplies. the NCP752 is 200 ma ldo that provides the engineer with a very stable, accurate voltage with ultra low noise and very high power supply rejection ratio (psrr) suitable for rf applications. the device doesn?t require any additional noise bypass capacitor to achieve ultra low noise performance. in order to optimize performance for battery operated portable applications, the NCP752 employs the auto low ? power function for ultra low quiescent current consumption. features ? operating input voltage range: 2.0 v to 5.5 v ? available in fixed voltage options: 0.8 to 3.5 v contact factory for other voltage options ? ultra low quiescent current of typ. 12 a ? ultra low noise: 11.5 v rms from 100 hz to 100 khz ? very low dropout: 130 mv typical at 200 ma ? 2% accuracy over load/line/temperature ? high psrr: 68 db at 1 khz ? power good output ? internal soft ? start to limit the inrush current ? thermal shutdown and current limit protections ? stable with a 1 f ceramic output capacitor ? available in tsop ? 5 and xdfn 1.5 x 1.5 mm package ? active output discharge for fast turn ? off ? these are pb ? free devices typical applications ? pdas, mobile phones, gps, smartphones ? wireless handsets, wireless lan, bluetooth ? , zigbee ? ? portable medical and other battery powered devices NCP752 in en out pg gnd off on 100k figure 1. typical application schematic v out c out 1 f v pg c in v in xdfn6 case 711ae marking diagrams http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 19 of this data sheet. ordering information tsop ? 5 case 483 1 5 xxxayw xxx = specific device code a = assembly location m = date code y = year w = work week = pb ? free package (note: microdot may be in either location) (top view) 1 out pg in n/c en gnd in gnd out pg 1 2 3 5 4 en pin connections x m 1 xdfn6 tsop ? 5 tsop ? 5 xdfn6
NCP752 http://onsemi.com 2 in out bandgap reference active discharge mosfet driver with current limit thermal shutdown uvlo enable logic en gnd auto low power mode en delay pg 0.8 v ? + ? + figure 2. simplified schematic block diagram pin function description pin no. xdfn 6 pin no. tsop ? 5 pin name description 1 5 out regulated output voltage pin. a small 1 f ceramic capacitor is needed from this pin to ground to assure stability. 2 4 pg open drain power good output. 3 2 gnd power supply ground. connected to the die through the lead frame. soldered to the copper plane allows for effective heat dissipation. 4 3 en enable pin. driving en over 0.9 v turns on the regulator. driving en below 0.4 v puts the regulator into shutdown mode. 5 n/c not connected. this pin can be tied to ground to improve thermal dissipation. 6 1 in input pin. a small capacitor is needed from this pin to ground to assure stability.
NCP752 http://onsemi.com 3 absolute maximum ratings rating symbol value unit input voltage (note 1) v in ? 0.3 v to 6 v v output voltage v out ? 0.3 v to v in + 0.3 v v enable input v en ? 0.3 v to v in + 0.3 v v power good output v pg ? 0.3 v to v in + 0.3 v v output short circuit duration t sc indefinite s maximum junction temperature t j(max) 150 c storage temperature t stg ? 55 to 150 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. refer to electrical characteristis and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per jesd22 ? a114 esd machine model tested per jesd22 ? a115 latchup current maximum rating tested per jedec standard: jesd78. thermal characteristics (note 3) rating symbol value unit thermal characteristics, tsop ? 5, thermal resistance, junction ? to ? air r ja 224 c/w thermal characteristics, xdfn6 1.5x1.5mm thermal resistance, junction ? to ? air r ja 149 c/w 3. single component mounted on 1 oz fr 4 pcb with 645 mm 2 cu area.
NCP752 http://onsemi.com 4 electrical characteristics ? 40 c t j 125 c; v in = v out(nom) + 0.3 v or 2.0 v, whichever is greater; i out = 10 ma, c in = c out = 1 f, unless otherwise noted. typical values are at t j = +25 c (note 4) parameter test conditions symbol min typ max unit operating input voltage v in 2.0 5.5 v undervoltage lock ? out v in rising uvlo 1.2 1.5 1.9 v output voltage accuracy v out + 0.3 v v in 5.5 v, i out = 0 ? 200 ma v out ? 2 +2 % line regulation v out + 0.3 v v in 5.5 v, i out = 10 ma reg line 300 v/v load regulation i out = 0 ma to 200 ma reg load 20 v/ma load transient i out = 1 ma to 200 ma or 200 ma to 1 ma in 1 s, c out = 1 s tran load 90 mv dropout voltage (note 5) i out = 200 ma, v out(nom) = 2.5 v v do 130 200 mv output current limit v out = 90% v out(nom) i cl 210 400 550 ma quiescent current i out = 0 ma i q 12 25 a ground current i out = 200 ma i gnd 150 a shutdown current v en 0.4 v, t j = +25 c i dis 0.12 a v en 0 v, v in = 5.5 v 0.55 1 a en pin threshold voltage high threshold low threshold v en voltage increasing v en voltage decreasing v en_hi v en_lo 0.9 0.4 v en pin input current v en = 5.5 v i en 100 500 na turn ? on time c out = 1.0 f, i out = 0 ma to 200 ma from v out = 10% v out(nom) to 95% v out(nom) t on1 80 s c out = 1.0 f, i out = 0 ma to 200 ma from assertion of the en to 95% v out(nom) t on2 200 s power supply rejection ratio v in = 3 v, v out = 2.5 v i out = 150 ma f = 100 hz f = 1 khz f = 10 khz psrr 70 68 53 db output noise voltage v out = 2.5 v, v in = 3 v, i out = 200 ma f = 100 hz to 100 khz v n 11.5 v rms thermal shutdown temperature temperature increasing from t j = +25 c t sd 160 c thermal shutdown hysteresis temperature falling from t sd t sdh ? 20 ? c power good output pg threshold voltage v out decreasing v pg ? 90 92 94 %v out pg threshold voltage v out increasing v pg+ 92 94 96 %v out hysteresis measured on v out 2 %v out pg output low voltage i out(pg) = 1 ma 0.1 0.4 v pg pin leakage v in = v out(nom) + 0.3 v 0.002 1 a pg time ? out delay NCP752a NCP752b t rd 2 200 s pg reaction time NCP752a NCP752b t rr 2 5 s 4. performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 5. characterized when v out falls 100 mv below the regulated voltage at v in = v out(nom) + 0.3 v.
NCP752 http://onsemi.com 5 typical characteristics 50 s/div figure 3. load transient response, 1 ma ? 30 ma NCP752a/b, v out = 0.8 v figure 4. load transient response, 1 ma ? 100 ma NCP752a/b, v out = 0.8 v figure 5. load transient response, 10 ma ? 110 ma NCP752a/b, v out = 0.8 v figure 6. load transient response, 1 ma ? 200 ma NCP752a/b, v out = 0.8 v figure 7. load transient response, 10 ma ? 210 ma NCP752a/b, v out = 0.8 v figure 8. load transient response, 1 ma ? 100 ma NCP752a/b, v out = 0.8 v 30 m a/di v50 m v/di v v in = 2 v v out = 0.8 v c in = c out = 1 f t rise = t fall = 1 s i out = 30 ma i out = 1 ma v out = 0.8 v 20 s/div v in = 2 v v out = 0.8 v c in = c out = 1 f t rise = t fall = 1 s 100 ma/div 50 mv/div i out = 1 ma v out = 0.8 v i out = 100 ma 100 m a/di v50 m v/di v 20 s/div i out = 10 ma v out = 0.8 v i out = 110 ma v in = 2 v v out = 0.8 v c in = c out = 1 f t rise = t fall = 1 s 50 s/div 200 ma/div 100 mv/div i out = 1 ma v out = 0.8 v i out = 200 ma v in = 2 v v out = 0.8 v c in = c out = 1 f t rise = t fall = 1 s 200 m a/di v 100 m v/di v i out = 10 ma v out = 0.8 v i out = 210 ma v in = 2 v v out = 0.8 v c in = c out = 1 f t rise = t fall = 1 s 20 s/div v in = 2 v v out = 0.8 v c in = c out = 1 f t rise = t fall = 1 s 200 ma/div 50 mv/div i out = 1 ma v out = 0.8 v i out = 200 ma 50 s/div
NCP752 http://onsemi.com 6 typical characteristics figure 9. load transient response, 1 ma ? 30 ma NCP752a/b, v out = 1.8 v 30 ma/div 50 mv/div v in = 2.3 v v out = 1.8 v c in = c out = 1 f t rise = t fall = 1 s i out = 1 ma v out = 1.8 v i out = 30 ma 20 s/div figure 10. load transient response, 1 ma ? 100 ma NCP752a/b, v out = 1.8 v 20 s/div 100 ma/div 50 mv/div v in = 2.3 v v out = 1.8 v c in = c out = 1 f t rise = t fall = 1 s v out = 1.8 v i out = 100 ma i out = 1 ma figure 11. load transient response, 1 ma ? 30 ma NCP752a/b, v out = 1.8 v 100 ma/div 50 mv/div v in = 2.3 v v out = 1.8 v c in = c out = 1 f t rise = t fall = 1 s i out = 10 ma v out = 1.8 v i out = 110 ma 20 s/div 200 ma/div 100 mv/div figure 12. load transient response, 1 ma ? 200 ma NCP752a/b, v out = 1.8 v 20 s/div v in = 2.3 v v out = 1.8 v c in = c out = 1 f t rise = t fall = 1 s v out = 1.8 v i out = 200 ma i out = 1 ma figure 13. load transient response, 10 ma ? 210 ma NCP752a/b, v out = 1.8 v 200 ma/div 100 mv/div v in = 2.3 v v out = 1.8 v c in = c out = 1 f t rise = t fall = 1 s i out = 10 ma v out = 1.8 v i out = 210 ma 20 s/div figure 14. load transient response, 1 ma ? 200 ma NCP752a/b, v out = 1.8 v 100 s/div 200 ma/div 50 v/div v in = 2.3 v v out = 1.8 v c in = c out = 1 f t rise = t fall = 10 s v out = 1.8 v i out = 1 ma i out = 200 ma
NCP752 http://onsemi.com 7 typical characteristics figure 15. load transient response, 1 ma ? 30 ma NCP752a/b, v out = 3.3 v 30 ma/div 50 mv/div v in = 3.8 v v out = 3.3 v c in = c out = 1 f t rise = t fall = 1 s i out = 1 ma v out = 3.3 v i out = 30 ma 20 s/div figure 16. load transient response, 1 ma ? 100 ma NCP752a/b, v out = 3.3 v 100 s/div 100 ma/div 50 mv/div i out = 1 ma v out = 3.3 v i out = 100 ma v in = 3.8 v v out = 3.3 v c in = c out = 1 f t rise = t fall = 1 s figure 17. load transient response, 10 ma ? 110 ma NCP752a/b, v out = 3.3 v 100 ma/div 50 mv/div v in = 3.8 v v out = 3.3 v c in = c out = 1 f t rise = t fall = 1 s i out = 10 ma v out = 3.3 v i out = 110 ma 20 s/div figure 18. load transient response, 1 ma ? 200 ma NCP752a/b, v out = 3.3 v 20 s/div v in = 3.8 v v out = 3.3 v c in = c out = 1 f t rise = t fall = 1 s 200 ma/div 100 mv/div i out = 1 ma v out = 3.3 v i out = 200 ma figure 19. load transient response, 10 ma ? 200 ma NCP752a/b, v out = 3.3 v 200 ma/div 100 mv/div v in = 3.8 v v out = 3.3 v c in = c out = 1 f t rise = t fall = 1 s i out = 10 ma v out = 3.3 v i out = 200 ma 20 s/div v in = 3.8 v v out = 3.3 v c in = c out = 1 f t rise = t fall = 1 s figure 20. load transient response, 1 ma ? 200 ma NCP752a/b, v out = 3.3 v 100 s/div 200 ma/div 50 mv/div i out = 1 ma v out = 3.3 v i out = 200 ma
NCP752 http://onsemi.com 8 typical characteristics figure 21. turn ? on response after asserting en NCP752a, v out = 0.8 v 200 ma/div 1 v/div v en = 1.2 v 100 s/div v en = 0 v v out = 0.8 v v pg = 0.8 v i out = 1 ma v in = 2 v c in = c out = 1 f v out = 0 v v pg = 0 v 100 ma/div 400 mv/div figure 22. turn ? on response after asserting en NCP752b, v out = 0.8 v 100 s/div 200 ma/div 1 v/div 100 ma/div 400 mv/div i out = 1 ma v in = 2 v c in = c out = 1 f v out = 0.8 v v pg = 0.8 v v en = 1.2 v v en = 0 v v out = 0 v v pg = 0 v figure 23. turn ? on response after asserting en NCP752a, v out = 1.8 v 100 s/div 100 ma/div 1 v/div 500 mv/div 1 v/div v out = 0 v v pg = 0 v v en = 0 v v en = 1.2 v v out = 1.8 v v pg = 1.8 v v in = 2.3 v c in = c out = 1 f i out = 1 ma 100 ma/div 2 v/div 500 mv/div 1 v/div figure 24. turn ? on response after asserting en NCP752b, v out = 1.8 v 100 s/div v en = 0 v v out = 0 v v pg = 0 v v in = 2.3 v c in = c out = 1 f v en = 1.2 v v out = 1.8 v v pg = 1.8 v i out = 1 ma figure 25. turn ? on response after asserting en NCP752a, v out = 3.3 v 100 s/div 1 v/div 1 v/div v out = 0 v v pg = 0 v v en = 0 v v in = 2.3 v c in = c out = 1 f v en = 1.2 v v out = 3.3 v v pg = 3.3 v i out = 1 ma figure 26. turn ? on response after asserting en NCP752b, v out = 3.3 v 200 s/div 100 ma/div 2 v/div 1 v/div 1 v/div 100 ma/div 2 v/div v en = 0 v v out = 0 v v pg = 0 v v in = 3.8 v c in = c out = 1 f v en = 1.2 v v out = 3.3 v v pg = 3.3 v i out = 1 ma
NCP752 http://onsemi.com 9 typical characteristics figure 27. turn ? off response after de ? asserting en NCP752a/b, v out = 0.8 v 500 s/div 400 mv/div v en = 1.2 v 200 mv/div 1 v/div v in = 2.0 v c in = c out = 1 f v out = 0.8 v v pg = 0.8 v v out = 0 v v pg = 0 v v en = 0 v 2 v/div 500 mv/div 1 v/div figure 28. turn ? off response after de ? asserting en NCP752a/b, v out = 1.8 v 500 s/div v in = 2.3 v c in = c out = 1 f v en = 1.2 v v out = 1.8 v v pg = 1.8 v v out = 0 v v pg = 0 v v en = 0 v figure 29. turn ? off response after de ? asserting en NCP752a/b, v out = 3.3 v 500 s/div 2 v/div 1 v/div 1 v/div v in = 3.8 v c in = c out = 1 f v en = 1.2 v v out = 3.3 v v pg = 3.3 v v en = 0 v v out = 0 v v pg = 0 v figure 30. turn ? off response due to thermal shutdown NCP752a/b, v out = 0.8 v 500 s/div v out = 0.8 v v pg = 0.8 v v out = 0 v v pg = 0 v v in = 2.0 v c in = c out = 1 f 400 mv/div 200 mv/div normal operation thermal shutdown figure 31. turn ? off response due to thermal shutdown, v out = 1.8 v 500 s/div 1 v/div 500 mv/div v out = 1.8 v v pg = 1.8 v normal operation thermal shutdown v out = 0 v v pg = 0 v v in = 2.3 v c in = c out = 1 f 2 v/div 1 v/div v out = 3.3 v v pg = 3.3 v normal operation thermal shutdown v out = 0 v v pg = 0 v v in = 3.8 v c in = c out = 1 f figure 32. turn ? off response due to thermal shutdown, v out = 3.3 v 500 s/div
NCP752 http://onsemi.com 10 typical characteristics figure 33. recovery from thermal shutdown NCP752a, v out = 0.8 v 500 s/div 400 mv/div 200 mv/div v out = 0.8 v v pg = 0.8 v v out = 0 v v pg = 0 v v in = 2.0 v c in = c out = 1 f 100 ma/div thermal shutdown normal operation i out = 1 ma figure 34. recovery from thermal shutdown NCP752b, v out = 0.8 v 500 s/div 400 mv/div 200 mv/div 100 ma/div thermal shutdown normal operation v out = 0.8 v v pg = 0.8 v v in = 2.0 v c in = c out = 1 f i out = 1 ma figure 35. recovery from thermal shutdown NCP752a, v out = 1.8 v 500 s/div figure 36. recovery from thermal shutdown NCP752b, v out = 1.8 v 500 s/div 1 v/div 500 mv/div 100 ma/div thermal shutdown normal operation v out = 0 v v pg = 0 v v out = 1.8 v v pg = 1.8 v v in = 2.3 v c in = c out = 1 f i out = 1 ma 1 v/div 500 mv/div 100 ma/div v out = 1.8 v v pg = 1.8 v v in = 2.3 v c in = c out = 1 f i out = 1 ma v out = 0 v v pg = 0 v thermal shutdown normal operation figure 37. recovery from thermal shutdown NCP752a, v out = 3.3 v 500 s/div 2 v/div 1 v/div 100 ma/div figure 38. recovery from thermal shutdown NCP752b, v out = 3.3 v 500 s/div thermal shutdown normal operation v out = 0 v v pg = 0 v 2 v/div 1 v/div 100 ma/div thermal shutdown normal operation v out = 0 v v pg = 0 v v out = 3.3 v v pg = 3.3 v v in = 3.8 v c in = c out = 1 f i out = 1 ma v out = 3.3 v v pg = 3.3 v v in = 3.8 v c in = c out = 1 f i out = 1 ma
NCP752 http://onsemi.com 11 typical characteristics figure 39. input voltage turn ? on response NCP752b, v out = 0.8 v 500 s/div figure 40. input voltage turn ? off response NCP752b, v out = 0.8 v 2 ms/div 100 ma/div v out = 0 v v pg = 0 v v in = v en = 0 v v in = v en = 2.0 v v pg = 0.8 v 1 v/div500 mv/div v out = 0.8 v i out = 1 ma 1 v/div 500 mv/div v in = v en = 2.0 v v out = 0.8 v v pg = 0.8 v v out = 0 v v pg = 0 v v in = v en = 0 v figure 41. input voltage turn ? on response NCP752b, v out = 1.8 v 500 s/div 100 ma/div 1 v/div500 mv/div v in = v en = 2.3 v v pg = 1.8 v v out = 1.8 v i out = 1 ma v out = 0 v v pg = 0 v v in = v en = 0 v figure 42. input voltage turn ? off response NCP752b, v out = 1.8 v 500 s/div 1 v/div 500 mv/div v pg = 1.8 v v out = 1.8 v v in = v en = 2.3 v v out = 0 v v pg = 0 v v in = v en = 0 v figure 43. input voltage turn ? on response NCP752b, v out = 3.3 v 500 s/div 100 ma/div 2 v/div 1 v/div v out = 0 v v pg = 0 v v in = v en = 0 v v in = v en = 2.3 v v pg = 1.8 v v out = 1.8 v 2 v/div 1 v/div v pg = 3.3 v v out = 3.3 v v in = v en = 3.8 v v out = 0 v v pg = 0 v v in = v en = 0 v figure 44. input voltage turn ? off response NCP752b, v out = 3.3 v 1 ms/div
NCP752 http://onsemi.com 12 typical characteristics figure 45. input voltage turn ? on response NCP752b, v out = 0.8 v 500 s/div 100 m a/di v 500 m v/di v v in = v en = 2.0 v v pg = 0.8 v v out = 2.0 v i out = 1 ma v out = 0 v v pg = 0 v v in = 0 v v en = 0 v figure 46. input voltage turn ? off response NCP752b, v out = 0.8 v 500 s/div 500 mv/div 1 v/div 500 mv/div 1 v/div v out = 0 v v pg = 0 v v in = 0 v v en = 0 v v pg = 0.8 v v out = 2.0 v v in = v en = 2.0 v figure 47. input voltage turn ? on response NCP752b, v out = 3.3 v 500 s/div 100 m a/di v v out = 0 v v pg = 0 v v in = 0 v v en = 0 v v in = v en = 3.8 v v pg = 3.8 v v out = 3.3 v i out = 1 ma 1 v/div 2 v/div figure 48. input voltage turn ? off response NCP752b, v out = 3.3 v 500 s/div 2 v/div 1 v/div v in = v en = 3.8 v v pg = 3.8 v v out = 3.3 v v out = 0 v v pg = 0 v v in = 0 v v en = 0 v figure 49. short ? circuit response NCP752b, v out = 3.3 v 500 s/div 200 m a/di v2 v/di v1 v/di v v pg = 3.8 v v out = 3.3 v i out = 360 ma v out = 0 v v pg = 0 v v out pulled to ground due to output short ? circuit figure 50. recovery from short ? circuit NCP752b, v out = 3.3 v 500 s/div short ? circuit removed from the output v pg = 0 v v out = 0 v v out = 3.3 v v pg = 3.8 v i sc = 360 ma i out = 1 ma v in = 3.8 v 200 ma/div 2 v/div 1 v/div
NCP752 http://onsemi.com 13 typical characteristics figure 51. line transient 2 v ? 2.5 v NCP752a/b, v out = 0.8 v 200 s/div 20 m v/di v 500 m v/di v v in = 2.0 v v out = 0.8 v i out = 10 ma v in = 2.5 v c out = 1 f t rise = t fall = 1 s figure 52. line transient 2 v ? 3 v NCP752a/b, v out = 0.8 v 200 s/div 20 mv/div 500 mv/div c out = 1 f t rise = t fall = 1 s v in = 2.0 v v out = 0.8 v i out = 10 ma v in = 3.0 v 20 m v/di v 500 m v/di v c out = 1 f t rise = t fall = 1 s v in = 2.8 v v in = 2.3 v v out = 1.8 v i out = 10 ma figure 53. line transient 2.3 v ? 2.8 v NCP752a/b, v out = 1.8 v 200 s/div figure 54. line transient 2.3 v ? 3.3 v NCP752a/b, v out = 1.8 v 200 s/div c out = 1 f t rise = t fall = 1 s 20 mv/div 1 v/div v in = 2.3 v v in = 3.3 v i out = 10 ma v out = 1.8 v 20 m v/di v 500 m v/di v figure 55. line transient 3.8 v ? 4.2 v NCP752a/b, v out = 3.3 v 200 s/div figure 56. line transient 3.8 v ? 4.8 v NCP752a/b, v out = 3.3 v 200 s/div 20 mv/div 500 mv/div c out = 1 f t rise = t fall = 1 s v in = 4.2 v v in = 3.8 v v out = 3.3 v i out = 10 ma i out = 10 ma v in = 4.8 v v in = 3.8 v v out = 3.3 v c out = 1 f t rise = t fall = 1 s
NCP752 http://onsemi.com 14 typical characteristics 0.790 0.792 0.794 0.796 0.798 0.800 0.802 0.804 0.806 0.808 0.810 ? 40 ? 20 0 20 40 60 80 100 120 140 t j , junction temperature ( c) figure 57. output voltage vs. temperature v out = 0.8 v v out , output voltage (v) 1.780 1.785 1.790 1.795 1.800 1.805 1.810 1.815 1.820 ? 40 ? 20 0 20 40 60 80 100 120 140 t j , junction temperature ( c) figure 58. output voltage vs. temperature v out = 1.8 v v out , output voltage (v) v in = 2 v c out = c out = 1 f i out = 10 ma v in = 2.3 v c out = c out = 1 f i out = 10 ma 3.280 3.285 3.290 3.295 3.300 3.305 3.310 3.315 3.320 ? 40 ? 20 0 20 40 60 80 100 120 140 t j , junction temperature ( c) figure 59. output voltage vs. temperature v out = 3.3 v v out , output voltage (v) v in = 3.8 v c out = c out = 1 f i out = 10 ma 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0 20 40 60 80 100 120 140 160 180 200 i out , output current (ma) figure 60. dropout voltage vs. load current v out = 1.8 v v do , dropout voltage (mv) t j = 25 c t j = 125 c t j = ? 40 c v out = 1.8 v c out = c out = 1 f v do , dropout voltage (mv) 0.2 0.18 0.16 0.14 0.12 0.1 0.08 0.06 0.02 0 0 20 40 60 80 100 120 140 160 180 200 i out , output current (ma) figure 61. dropout voltage vs. load current v out = 3.3 v v out = 3.3 v c out = c out = 1 f t j = 25 c t j = 125 c t j = ? 40 c 0 5 10 15 20 25 30 35 40 45 50 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 i q , quiescent current ( a) v in , input voltage (v) figure 62. quiescent current vs. input voltage v out = 0.8 v t j = 125 c t j = 25 c t j = ? 40 c v out = 0.8 v c out = c out = 1 f
NCP752 http://onsemi.com 15 typical characteristics 0 5 10 15 20 25 30 35 40 45 50 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 i q , quiescent current ( a) v in , input voltage (v) figure 63. quiescent current vs. input voltage v out = 1.8 v t j = 125 c t j = 25 c t j = ? 40 c v out = 1.8 v c out = c out = 1 f 0 5 10 15 20 25 30 35 40 45 50 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 i q , quiescent current ( a) v in , input voltage (v) figure 64. quiescent current vs. input voltage v out = 3.3 v v out = 3.3 v c out = c out = 1 f t j = 125 c t j = 25 c t j = ? 40 c 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 ? 40 ? 20 0 20 40 60 80 100 120 140 v line_reg , line regulation (mv) t j , junction temperature ( c) figure 65. line regulation vs. temperature v out = 3.3 v v out = 0.8 v v in = v out + 0.5 v or 2 v up to 5.5 v c out = c out = 1 f i out = 10 ma 0 1 2 3 4 5 6 7 8 9 10 ? 40 ? 20 0 20 40 60 80 100 120 140 v load_reg , load regulation (mv) t j , junction temperature ( c) figure 66. load regulation vs. temperature v out = 3.3 v v out = 0.8 v v in = v out + 0.5 v c out = c out = 1 f i out = 0 ma ? 200 ma 200 250 300 350 400 450 500 ? 40 ? 20 0 20 40 60 80 100 120 140 i sc , short ? circuit (ma) t j , junction temperature ( c) figure 67. short ? circuit vs. temperature v out = 1.8 v v out = 1.8 v v out = 3.3 v v out = 0.8 v v in = v out + 0.5 v or 2 v c out = c out = 1 f v out = gnd 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 ? 40 ? 20 0 20 40 60 80 100 120 140 v en , enable threshold (v) t j , junction temperature ( c) figure 68. enable threshold vs. temperature v in = v out + 0.5 v or 2 v c out = c out = 1 f v out = gnd v en increasing v en decreasing
NCP752 http://onsemi.com 16 typical characteristics 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 ? 40 ? 20 0 20 40 60 80 100 120 140 v uvlo , uvlo threshold (v) t j , junction temperature ( c) figure 69. uvlo threshold vs. temperature v in = v en c out = c out = 1 f v out = gnd v in increasing v in decreasing 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 ? 40 ? 20 0 20 40 60 80 100 120 140 i dis , disable current ( a) t j , junction temperature ( c) figure 70. disable current vs. temperature v en = v out + 0.5 v c out = c out = 1 f v en = 0 v 100 120 140 160 180 200 220 240 260 280 300 ? 40 ? 20 0 20 40 60 80 100 120 140 t on , turn ? on time ( s) t j , junction temperature ( c) figure 71. turn ? on time vs. temperature v out = 0.8 v v out = 3.3 v v in = v out + 0.5 v or 2 v c out = c out = 1 f v en = 0 v to 1 v i out = 10 ma 90 91 92 93 94 95 96 97 98 99 100 ? 40 ? 20 0 20 40 60 80 100 120 140 v out rising v out falling t j , junction temperature ( c) figure 72. pg threshold vs. temperature v pg , power good threshold (%v out ) v in = v out + 0.5 v or 2 v c out = c out = 1 f 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 ? 40 ? 20 0 20 40 60 80 100 120 140 v pg_hyst , power good hysteresis (%v out ) t j , junction temperature ( c) figure 73. pg threshold hysteresis vs. temperature v in = v out + 0.5 v or 2 v c out = c out = 1 f 0 10 20 30 40 50 60 70 80 90 100 ? 40 ? 20 0 20 40 60 80 100 120 140 t j , junction temperature ( c) figure 74. pg pin leakage vs. temperature i pg_leak , power good leakage (na) v pg = 5.5 v c out = c out = 1 f
NCP752 http://onsemi.com 17 typical characteristics 0 10 20 30 40 50 60 70 80 90 100 ? 40 ? 20 0 20 40 60 80 100 120 140 t j , junction temperature ( c) figure 75. pg low voltage vs. temperature v pg_low , power good voltage (mv) v in = 2 v c out = 1 f i pg = 1 ma 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 ? 40 ? 20 0 20 40 60 80 100 120 140 t j , junction temperature ( c) figure 76. NCP752a pg reaction time, delay timing t rd , t rr , pg timing ( s) v in = v out + 0.5 v c out = c in = 1 f NCP752a pg timeout delay pg reaction time 0 20 40 60 80 100 120 140 160 180 200 ? 40 ? 20 0 20 40 60 80 100 120 140 t j , junction temperature ( c) figure 77. NCP752b pg reaction time, delay timing t rd , t rr , pg timing ( s) pg timeout delay pg reaction time v in = v out + 0.5 v c out = c in = 1 f NCP752b 100 0 50 100 150 200 output current (ma) figure 78. stability vs. output capacitors esr capacitor esr ( ) 10 1 0.1 0.01 v in = v out + 0.3 v or 2.0 v c out = c in = 1 f unstable operation stable operation v out = 3.3 v
NCP752 http://onsemi.com 18 application information the NCP752 is a high performance, 200 ma ldo voltage regulator with open ? drain pg flag. this device delivers excellent noise and dynamic performance. thanks to its adaptive ground current feature the device consumes only 12 a of quiescent current at no ? load condition. the regulator features very ? low noise of 11.5 v rms , psrr of typ. 68 db at 1 khz and very good load/line transient response. the device is an ideal choice for battery powered portable applications. a logic en input provides on/off control of the output voltage. when the en is low the device consumes as low as typ. 120 na from the in pin. the device is fully protected in case of output overload, output short circuit condition and overheating, assuring a very robust design. input capacitor selection (c in ) it is recommended to connect a minimum of 1 f ceramic x5r or x7r capacitor close to the in pin of the device. larger input capacitors may be necessary if fast and large load transients are encountered in the application. there is no requirement for the min./max. esr of the input capacitor but it is recommended to use ceramic capacitors for their low esr and esl. output capacitor selection (c out ) the NCP752 is designed to be stable with small 1.0 f and larger ceramic capacitors on the output. the minimum effective output capacitance for which the ldo remains stable is 500 nf. the safety mar gin is provided to account for capacitance variations due to dc bias voltage, temperature, initial tolerance. there is no requirement for the minimum value of equivalent series resistance (esr) for the c out but the maximum value of esr should be less than 700 m . larger output capacitors could be used to improve the load transient response or high frequency psrr characteristics. it is not recommended to use tantalum capacitors on the output due to their large esr. the equivalent series resistance of tantalum capacitors is also strongly dependent on the temperature, increasing at low temperature. the tantalum capacitors are generally more costly than ceramic capacitors. no ? load operation the regulator remains stable and regulates the output voltage properly within the 2% tolerance limits even with no external load applied to the output. enable operation the NCP752 uses the en pin to enable/disable its output and to control the active discharge function. if the en pin voltage is < 0.4 v the device is guaranteed to be disabled. the pass transistor is turned ? off so that there is virtually no current flow between the in and out. in case of the option equipped with active discharge ? the active discharge transistor is turned ? on and the output voltage v out is pulled to gnd through a 1 k resistor. in the disable state the device consumes as low as typ. 120 na from the v in . if the en pin voltage > 0.9 v the device is guaranteed to be enabled. the NCP752 regulates the output voltage and the active dischar ge transistor is turned ? off. the en pin has an internal pull down current source with typ. value of 100 na which assures that the device is turned ? off when the en pin is not connected. a build in deglitch time in the en block prevents from periodic on/off oscillations that can occur due to noise on en line. in the case that the en function isn? t required the en pin should be tied directly to in. reverse current the pmos pass transistor has an inherent body diode which will be forward biased in the case that v out > v in . due to this fact in cases where the extended reverse current condition is anticipated the device may require additional external protection. output current limit output current is internally limited within the ic to a typical 400 ma. the NCP752 will source this amount of current measured with the output voltage 100 mv lower than the nominal v out . if the output voltage is directly shorted to ground (v out = 0 v), the short circuit protection will limit the output current to 410 ma (typ). the current limit and short circuit protection will work properly up to v in = 5.5 v at t a = 25 c. there is no limitation for the short circuit duration. thermal shutdown when the die temperature exceeds the thermal shutdown threshold (tsd ? 160 c typical), thermal shutdown event is detected and the device is disabled. the ic will remain in this state until the die temperature decreases below the thermal shutdown reset threshold (tsdu ? 140 c typical). once the ic temperature falls below the 140 c the ldo is enabled again. the thermal shutdown feature provides protection from a catastrophic device failure due to accidental overheating. this protection is not intended to be used as a substitute for proper heat sinking. power dissipation as power dissipated in the ldo increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and the ambient temperature af fect the rate of junction temperature rise for the part. the maximum power dissipation the NCP752 can handle is given by: p d(max) 125 t a ja (eq. 1)
NCP752 http://onsemi.com 19 for reliable operation junction tempertaure should be limited to +125 c. the power dissipated by the NCP752 for given application conditions can be calculated as follows: p d(max) v in i gnd i out v in v out (eq. 2) load regulation the NCP752 features very good load regulation of typical 4 mv in the 0 ma to 200 ma range. in order to achieve this very good load regulation a special attention to pcb design is necessary. the trace resistance from the out pin to the point of load can easily approach 100 m which will cause a 20 mv voltage drop at full load current, deteriorating the excellent load regulation. line regulation the ic features very good line regulation of 0.3 mv/v measured from v in = v out + 0.5 v to 5.5 v. power supply rejection ratio at low frequencies the psrr is mainly determined by the feedback open ? loop gain. at higher frequencies in the range 100 khz ? 10 mhz it can be tuned by the selection of c out capacitor and proper pcb layout. output noise the ic is designed for very ? low output voltage noise. the typical noise performance of 11.5 v rms makes the device suitable for noise sensitive applications. internal soft start the internal soft ? start circuitry will limit the inrush current during the ldo turn ? on phase. please refer to typical characteristics section for typical inrush current values. the soft ? start function prevents from any output voltage overshoots and assures monotonic ramp ? up of the output voltage. pcb layout recommendations to obtain good transient performance and good regulation characteristics place c in and c out capacitors close to the device pins and make the pcb traces wide. in order to minimize the solution size use 0402 capacitors. larger copper area connected to the pins will also improve the device thermal resistance. the actual power dissipation can be calculated by the formula given in equation 2. ordering information device v out option marking rotation description package shipping ? NCP752amx18tcg 1.8 v a 90 ver. a pg time-out delay: 2 s (typ) pg reaction time: 2 s (typ) xdfn6 (pb ? free) 3000 / tape & reel NCP752amx28tcg 2.8 v d 90 NCP752amx30tcg 3.0 v e 90 NCP752amx33tcg 3.3 v f 90 NCP752asn18t1g 1.8 v eda tsop ? 5 (pb ? free) NCP752asn28t1g 2.8 v edc NCP752asn30t1g 3.0 v edd NCP752asn33t1g 3.3 v ede NCP752bmx18tcg 1.8 v a 270 ver. b pg time-out delay: 200 s (typ) pg reaction time: 5 s (typ) xdfn6 (pb ? free) NCP752bmx28tcg 2.8 v d 270 NCP752bmx30tcg 3.0 v e 270 NCP752bmx33tcg 3.3 v f 270 NCP752bsn18t1g 1.8 v eea tsop ? 5 (pb ? free) NCP752bsn28t1g 2.8 v eec NCP752bsn30t1g 3.0 v eed NCP752bsn33t1g 3.3 v eee ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NCP752 http://onsemi.com 20 package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.10 and 0.20mm from terminal tip. c a seating plane d e 0.10 c a3 a1 2x 2x 0.10 c xdfn6 1.5x1.5, 0.5p case 711ae issue o dim a min max millimeters 0.35 0.45 a1 0.00 0.05 a3 0.13 ref b 0.20 0.30 d e e l pin one reference 0.05 c 0.05 c a 0.10 c note 3 l2 e b b 3 6 6x 1 4 0.05 c mounting footprint* l1 1.50 bsc 1.50 bsc 0.50 bsc 0.40 0.60 --- 0.15 bottom view l 5x dimensions: millimeters 0.73 6x 0.35 5x 1.80 0.50 pitch *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. l1 detail a l alternate terminal constructions l2 0.50 0.70 top view b side view recommended 0.83 a
NCP752 http://onsemi.com 21 package dimensions tsop ? 5 case 483 ? 02 issue j notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. dimension a. 5. optional construction: an additional trimmed lead is allowed in this location. trimmed lead not to extend more than 0.2 from body. dim min max millimeters a 3.00 bsc b 1.50 bsc c 0.90 1.10 d 0.25 0.50 g 0.95 bsc h 0.01 0.10 j 0.10 0.26 k 0.20 0.60 l 1.25 1.55 m 0 10 s 2.50 3.00 123 54 s a g l b d h c j 0.7 0.028 1.0 0.039 mm inches scale 10:1 0.95 0.037 2.4 0.094 1.9 0.074 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.20 5x c ab t 0.10 2x 2x t 0.20 note 5 t seating plane 0.05 k m detail z detail z on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 NCP752/d bluetooth is a registered trademark of bluetooth sig. zigbee is a registered of zigbee alliance. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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